1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a technique employed in a system LSI using an SOI (Silicon On Insulator) substrate or an SON (Silicon On Nothing) substrate.
2. Description of the Related Art
Conventionally, the SOI is widely known as a structure having a silicon layer formed on an insulating film. In recent years, reductions in the power consumption or increases in the operation speed of a logic circuit have been positively attempted by forming semiconductor elements on the SOI. It is expected that the SOI will be used in a system LSI embedded a DRAM (Dynamic Random Access Memory).
A MOS transistor formed on an SOI may exhibit an unusual phenomenon caused by floating of a potential of a body region in which a channel is formed. This phenomenon is called the floating body effect. The floating body effect causes fluctuations in the leakage current or the threshold voltage in a semiconductor element. Therefore, a MOS transistor formed on an SOI is unsuited for a circuit that requires the leakage current or the threshold voltage to be controlled accurately, for example, a DRAM cell array or a sense amplifier. On the other hand, a MOS transistor formed on an SOI is most suited for a logic circuit which performs digital operations. Thus, whether the SOI is suited for a circuit or not depends on the type of circuit.
For this reason, a structure is proposed, in which an SOI is formed on a part of a semiconductor substrate (hereinafter referred to as a patterned SOI structure). In this structure, a logic circuit is formed on an SOI on a part of the semiconductor substrate (an SOI region), while a DRAM is formed on a region where the SOI is not formed (a bulk region). A method for forming the patterned SOI is proposed in Jpn. Pat. Appln. KOKAI Publications Nos. 8-17694, 10-303385, 8-316431, 7-106434, 11-238860, 2000-91534 and 2000-243944, “2000 Symposium on VLSI Technology Digest of Technical Papers” by Robert Hannon et al., pp. 66-67, and “2000 IEDM Technical Digest” by Ho et al., pp. 503-506.
If a patterned SOI is used, MOS transistors on the SOI and the silicon layer of the same semiconductor substrate can be used in different ways according to the characteristics of the semiconductor elements. Therefore, the operation speed and the performance of a system LSI can be increased.
However, near the boundary between the SOI region and the bulk region, a stress is generated owing to the boundary forming process, or difference in substrate structure between the regions. This stress and crystal defects due to the stress can cause change in the mobility of electrons or holes, in the diffusion profiles of impurity dopants, and in junction leakage current. As a result, in the conventional patterned SOI structure, the characteristics of a semiconductor element located on the boundary between the SOI region and the bulk region may be changed.